EPCQ-L Serial Configuration Overview
Use the 4-byte addressing method to access the EPCQ-L256, EPCQ-L512, or EPCQ-L1024 memory. The address width in 4-byte addressing mode is 32 bits. You must carry out the 4BYTEADDREN operation to enable the 4-byte addressing mode. Following the 4BYTEADDREN operation, this addressing mode becomes operational and is maintained throughout consecutive power-ups. You must perform the 4BYTEADDREX operation in order to turn off the 4-byte addressing mode.
You do not need to do the 4BYTEADDREN operation if you are programming the EPCQ-L256, EPCQ-L512, or EPCQ-L1024 device using the Intel Quartus® Prime software or the SRunner software. When configuring the device, these software tools automatically enable the 4-byte addressing mode.
The following features are provided by EPCQ-L devices:
Compatibility with devices made by Intel, including the Stratix 10, Arria 10, and Cyclone 10 GX.
Active serial (AS) x4 has native support.
Support for AS x1 backward compatibility on Intel Arria 10 and Intel Cyclone 10 GX hardware.
Non-volatile memory and a low pin count.
Operating at 1.8 V.
For the EPCQ-L512 and EPCQ-L1024 devices, stacked die device.
Produced using NOR technology.
Offered in the FBGA24 bundle.
Memory that is reprogrammable and has more than 100,000 program or erase cycles.
Retention of data for more than 20 years.
Support for memory sector write prevention utilizing status register bits.
Using a single operation code, a rapid read and extended quad input can read the full memory.
