Field programmable gate arrays (FPGAS) in the ACT4 1 family come in a range of packagc, speed, and application configurations. Derices are used in silicon gate implementation. MetalCMOS devices that are either 1.2-micron or 2-micron two-level feature Acte's PLICETM antifiuse technology. The special design of the ofiers allows for flexibility, high performance, and quick turnaround through user programming. Device activation accounts for over 95% of all logical devices.
Additionally, system designers are given exclusive on-chip diagnostic probe capabilities by ACT 1 devices, allowing for simple testing and debugging. Additional features include a hardwired distribution network and an off-chip clock driver. With the least amount of skew, the network provides efficient clock distribution.
Both CMOS drive levels and TIL drive levels can be driven by the user-definable IOs. J-leaded chip carriers made of plastic and ceramic, ceramic and plastic quad flatpacks, and ceramic pin grid array are all available packaging. It is possible to program a security fuse to prevent copying or reverse engineering of the design by disabling all additional programming.
