Devices in Actel's second-generation ProASICPLUS family of flash FPGAs have improved performance over those in the ProASIC family. Through nonvolatile flash technology, it combines the benefits of ASICs and programmable devices. Engineers can now develop high-density systems using the ASIC or FPGA design flows and tools that are already available. A special clock conditioning circuit based on two onboard phase-locked loops (PLLs) is also available from the ProASICPLUS family. The family provides 50 MHz PCI speed with up to 1 million system gates, 198 bits of two-port SRAM, and up to 712 user I/Os. Beyond performance, the designer has benefits. Four levels of routing hierarchy make routing simpler than it is with SRAM-based FPGAs, and the use of flash technology enables all functionality to be operational at power-up. Device programming does not require an external boot PROM.
Although access to the program information is restricted by onboard security measures, in-system reprogramming is possible to support future design iterations and field updates. The architecture of the device reduces the difficulty of ASIC migration at higher user volumes. As a result, ProASICPLUS is a sensible choice for applications in the computing, networking, and avionics sectors.
