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Macrocell CMOS CPLD

Macrocell CMOS CPLD

Macrocell CMOS CPLD

Macrocell CMOS CPLD Overview

A high performance CPLD with broad purpose logic integration is the XC7336. It is made up of four 24V9 Fast Function Blocks that resemble PAL and are connected to one another using the 100% filled Universal Interconnect Matrix (UIMTM). The XC7336 has speed grades ranging from 5 to 15 ns and is built using 0.8 u CMOS EPROM technology. The XC7336Q, which offers lower power consumption in speed classes of 10, 12, and 15, is also on the market right now.

A high performance CPLD with general purpose logic integration is the XC7354. It is made up of two 24V9 Fast Function Blocks that resemble PAL, two High Density Function Blocks, and a 100% populated Universal Interconnect Matrix (UIM).

Power Management 

The XC7354 has a power-management system that enables the operation of non-speed-critical routes of a design at decreased power. Since only a small number of paths are typically speed-critical in systems, overall power consumption is frequently greatly reduced. By adding attributes to the logic schematic or declaration statements to the behavioral description, macrocells can each be customized for high performance or low power operation. Unused macrocells in used Function Blocks are set up for low power operation, while unused Function Blocks are shut off to reduce power dissipation.


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