The Speedster22i device is an FPGA that is primarily designed for communications and test applications and includes built-in end-to-end, hard-core IP interface protocol functions. The hard IP for the Speedster22i comes with a full stack of I/O protocols that can be used with 10/40/100G, Interlaken, PCI Express gen1/2/3, and 2.133Gbps DDR3 memory controllers. Other FPGAs use programmable arrays to implement these functions, which makes timing closure difficult and necessitates as many as 500,000 equivalent look-up tables (LUTs) in the programmable array. They are all simple connections in Speedster FPGA products, but they add a lot of money and power to conventional FPGA designs. Furthermore, the hard-core IP that is embedded eliminates the soft-core IP costs related to the acquisition, integration, and testing of these functions.
Achronix Semiconductor also has a full suite of ACE (Achronix CAD Environment) development software, which offers integration, place and route, simulation, static timing analysis, and other features to give clients a productive development environment.