Digital Design with FPGAs: A Practical Guide

Field-Programmable Gate Arrays (FPGAs) are reconfigurable integrated circuits used for implementing digital logic, signal processing, and embedded systems. Unlike microcontrollers, FPGAs allow parallel processing and hardware-level customization, making them ideal for high-speed, low-latency applications.

1. FPGA Basics

What is an FPGA?

An FPGA consists of:

• Configurable Logic Blocks (CLBs) – Basic logic units (LUTs, flip-flops).

• Programmable Interconnects – Routes signals between blocks.

• I/O Blocks – Interface with external components.

• DSP Slices & Block RAM – For math operations and data storage.

FPGA vs. Microcontroller

2. FPGA Design Flow

Step 1: Design Entry

Hardware Description Languages (HDLs):

VHDL (Strongly typed, common in Europe).

Verilog (C-like syntax, popular in the US).

Example (Verilog):

module blink_led (
    input clk,
    output reg led);
    reg [31:0] counter;
    always @(posedge clk) begin
        counter <= counter + 1;
        if (counter >= 50_000_000) begin
            led <= ~led;
            counter <= 0;
        end
    endendmodule

Step 2: Simulation (Testbenches)

Use ModelSim, Vivado Simulator, or iverilog to verify logic.

Example testbench:

`timescale 1ns/1psmodule tb_blink();
    reg clk;
    wire led;
    blink_led uut (clk, led);
    initial begin
        clk = 0;
        forever #5 clk = ~clk; // 100 MHz clock
    end
    initial #1000 $finish;endmodule

Step 3: Synthesis & Place-and-Route

• Tools: Xilinx Vivado, Intel Quartus, or Lattice Diamond.

• Converts HDL into a netlist and maps it to FPGA resources.

Step 4: Bitstream Generation & Programming

• Generate a .bit or .sof file and flash it to the FPGA via JTAG/USB.

3. Key FPGA Concepts

Combinational vs. Sequential Logic

• Combinational: Output depends only on current inputs (e.g., AND gates).

• Sequential: Output depends on current inputs + past states (e.g., flip-flops).

Finite State Machines (FSMs)

Used for control logic. Example (Traffic Light Controller):

module traffic_light (
    input clk, reset,
    output reg red, yellow, green);
    reg [1:0] state;
    parameter S_RED = 0, S_GREEN = 1, S_YELLOW = 2;

    always @(posedge clk or posedge reset) begin
        if (reset) state <= S_RED;
        else case (state)
            S_RED:    begin red=1; green=0; yellow=0; state <= S_GREEN; end
            S_GREEN:  begin red=0; green=1; yellow=0; state <= S_YELLOW; end
            S_YELLOW: begin red=0; green=0; yellow=1; state <= S_RED; end
        endcase
    endendmodule

Pipelining

• Breaks operations into stages to improve clock speed.

4. Popular FPGA Development Boards

5. Example Project: PWM LED Dimmer

Verilog Code

module pwm_led (
    input clk,
    input [7:0] duty_cycle,
    output reg led);
    reg [7:0] counter;
    always @(posedge clk) begin
        counter <= counter + 1;
        led <= (counter < duty_cycle) ? 1 : 0;
    endendmodule

Steps to Implement

1. Write the HDL code.

2. Simulate with a testbench.

3. Synthesize and program the FPGA.

4. Connect an LED to an FPGA GPIO pin.

6. Advanced Topics

• High-Level Synthesis (HLS) – Write C/C++ code (Xilinx Vitis HLS).

• Soft-Core Processors (e.g., MicroBlaze, Nios II).

• FPGA Accelerators (AI/ML, cryptography).

7. Resources

• Books:

• FPGA Prototyping by Verilog Examples (Pong Chu).

• Free Range VHDL (Bryan Mealy).

• Online Courses:

• Coursera: FPGA Design for Embedded Systems (University of Colorado).

• Udemy: Learn VHDL and FPGA Development.

• Tools:

• Xilinx Vivado (Free WebPack Edition).

• Intel Quartus Prime Lite.

Conclusion

FPGAs offer unparalleled flexibility for digital design. Start with simple projects (LED blink, PWM) and progress to complex systems (DSP, robotics).