It includes the ISPGAL22V10AB-5LNI, made with the cutting-edge 3.3V ECMOS process from Lattice Semiconductor, which blends CMOS with Electrically Erasable(E2) floating gate technology. Both 3.3V and 5V signal levels can be interfaced with by the ispGAL22LV10.
The ISPGAL22V10AB-5LNI is fully functionally and fuse-map compatible with the ispGAL22LV10. Additionally, the ISPGAL22V10AB-5LNI is parametrically compatible. The pin-out for the GAL22LV10's 28-pin PLCC package is likewise shared by the ispGAL22LV10. Complete AC, DC, and functional testing may be done while manufacturing thanks to special test circuitry and reprogrammable cells. Because of this, Lattice Semiconductor provides all GAL products with 100% field programmability and functionality. Also requested are 10,000 erase/write cycles and data retention periods longer than 20 years.
Electrically-erasable PLD, PROGRAMMABLE LO VOLT E2CMOS PLD, and SPLD - Simple Programmable Logic Devices are all available in the ISPGAL22V10AB-5LNI.
Specification | Value |
---|---|
Logic Family | ispGAL |
Number of Macrocells | 10 |
Maximum Operating Frequency | 200 MHz |
Delay Time | 5 nS |
Operating Supply Voltage | 2.3 V to 2.7 V |
Supply Current | 90 mA |
Maximum Operating Temperature | + 105 C |
Minimum Operating Temperature | - 40℃ |
Mounting Style | SMD/SMT |
Package / Case | QFN-32 |
Operating Temperature | - 40℃ to + 105 C |
Packaging | Tube |
Factory Pack Quantity | 2450 |
Supply Voltage - Max | 2.7 V |
Supply Voltage - Min | 2.3 V |
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