In order to improve data transmission, there are 240 I/Os. A basic construction block consists of 128000 logic pieces or cells. A supply voltage of 1V volts must be given for the device to work. P There are 240 outputs incorporated into a gadget like this. On chips, there are 484 terminations altogether. The device has been built using 84 pins. This FPGA must be installed in Surface Mount for it to function as intended and in line with its specifications. The maximum working temperature for FPGA chips in this module is 85°C. FPGA electronics are required to keep the working temperature above 0°C.
Source-synchronous interfacing using
Digitally controlled impedance (DCI) active termination
Flexible fine-grained I/O banking
High-speed memory interface support with integrated write-leveling capability
Wireless Communications
Voice recognition
Embedded Vision
Audio
Specifications | Value |
Contact Plating | Lead, Tin |
Mount | Surface Mount |
Package / Case | FCBGA |
Number of Pins | 484 |
JESD-609 Code | e0 |
Pbfree Code | no |
Moisture Sensitivity Level (MSL) | 4 |
Number of Terminations | 484 |
Terminal Finish | Tin/Lead (Sn63Pb37) |
Max Operating Temperature | 85°C |
Min Operating Temperature | 0°C |
Subcategory | Field Programmable Gate Arrays |
Technology | CMOS |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Peak Reflow Temperature (Cel) | NOT SPECIFIED |
Supply Voltage | 1V |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
Pin Count | 484 |
Number of Outputs | 240 |
Qualification Status | Not Qualified |
Temperature Grade | OTHER |
Max Supply Voltage | 1.05V |
Min Supply Voltage | 950mV |
Number of I/O | 240 |
RAM Size | 1.2MB |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Number of Logic Elements/Cells | 128000 |
Number of Logic Blocks (LABs) | 10000 |
Speed Grade | 1 |
Combinatorial Delay of a CLB-Max | 5.08 ns |
Height Seated (Max) | 3mm |
Length | 23mm |
Width | 23mm |
RoHS Status | RoHS Compliant |
Length | 23mm |
Width | 23mm |
RoHS Status | ROHS3 Compliant |
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