XC6VLX550T-2FF1759C
840 I/O ports on the device allow for more efficient data transfer. A basic construction block has 549888 logic cells or components. FPGA chips require a power source of 1V volts to function. With a Surface Mount, this FPGA module can be connected to the development board. Fpga chips require a battery to operate at a voltage between 0.95V and 1.05V. Given that it has 840 different outputs, this device is incredibly adaptable. Due to space restrictions, Tray now includes this FPGA type. There have been 1759 terminations in all.
Integrated interface blocks for PCI Express® designs
Flexible configuration options
GTX transceivers: up to 6.6 Gb/s
Source-synchronous interfacing using
Digitally controlled impedance (DCI) active termination
Embedded Vision
Audio
Enterprise networking
Software-defined radios
| Specifications | Value |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 1760-BBGA, FCBGA |
| Operating Temperature | 0°C~85°C TJ |
| Packaging | Tray |
| Published | 2008 |
| Series | Virtex®-6 LXT |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 4 (72 Hours) |
| Number of Terminations | 1759 |
| ECCN Code | 3A001.A.7.A |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Subcategory | Field Programmable Gate Arrays |
| Technology | CMOS |
| Voltage - Supply | 0.95V~1.05V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1V |
| Terminal Pitch | 1mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | XC6VLX550T |
| Pin Count | 1759 |
| JESD-30 Code | S-PBGA-B1759 |
| Number of Outputs | 840 |
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