For more effective data transport, 1200 I/Os are provided. 549888 logic cells/elements make comprise a basic building block. A voltage supply of 0.9V volts is needed to power FPGA chips. The RAM si2.8MBe of this FPGA module must increase to 2.8MB GB in order to ensure that the software runs as intended. In this instance, the design makes use of 1760 pins. This FPGA will function flawlessly in accordance with its specifications as long as it is put in Surface Mount. Designers may fully utilize the device's flexibility with a 900mV supply voltage. 11.2/2.5V batteries power this battery-powered device.
Optional pipelining
New optional pre-adder to assist filtering applications
Optional bitwise logic functionality
Dedicated cascade connections
Industrial Automation
Communications
Automotive
Consumer Electronics
Artificial Intelligence
5G Technology
Specifications | Value |
Mount | Surface Mount |
Package / Case | FCBGA |
Number of Pins | 1760 |
Published | 2008 |
JESD-609 Code | e1 |
Pbfree Code | yes |
Part Status | Active |
Moisture Sensitivity Level (MSL) | 4 |
ECCN Code | 3A001.A.7.A |
Terminal Finish | Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Max Operating Temperature | 85°C |
Min Operating Temperature | 0°C |
HTS Code | 8542.39.00.01 |
Subcategory | Field Programmable Gate Arrays |
Technology | CMOS |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Peak Reflow Temperature (Cel) | 245 |
Supply Voltage | 0.9V |
Terminal Pitch | 1mm |
Time@Peak Reflow Temperature-Max (s) | 30 |
Qualification Status | Not Qualified |
Operating Supply Voltage | 900mV |
Supply Voltage-Max (Vsup) | 0.93V |
Power Supplies | 11.2/2.5V |
Temperature Grade | OTHER |
Number of I/O | 1200 |
RAM Size | 2.8MB |
Clock Frequency | 1098MHz |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Number of Logic Elements/Cells | 549888 |
Number of Logic Blocks (LABs) | 42960 |
Combinatorial Delay of a CLB-Max | 5.87 ns |
Height Seated (Max) | 3.5mm |
Length | 42.5mm |
Width | 42.5mm |
RoHS Status | RoHS Compliant |
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