The EPM1270F256C5NES design software is compatible with MAX II devices and has a new, optional MAX+PLUS II interface. It provides HDL and schematic design entry, compilation and logic synthesis, full simulation and advanced timing analysis, and device programming. Consult the Design Software Selector Guide for more details on the Quartus II software features. The Quartus II software is compatible with Sun Solaris, Linux Red Hat v8.0, Windows XP/2000/NT, and HP-UX. Additionally, it allows for simple interaction with top EDA tools via the NativeLink interface.
Low-cost, low-power CPLD
Instant-on, non-volatile architecture
Supports hot-socketing
Provides fast propagation delay and clock-to-output times
Provides four global clocks with two clocks available per logic array block (LAB)
UFM block up to 8 Kbits for non-volatile storage
IP and Smart camera
Video and night vision equipment
LTE radio and baseband
Multifunction printers
Broadcast camera
| Specification | Value |
|---|---|
| Series | MAX II |
| Memory Type | Flash |
| Number of Macrocells | 980 |
| Maximum Operating Frequency | 304 MHz |
| Delay Time | 6.2 ns |
| Number of Programmable I/Os | 212 |
| Operating Supply Voltage | 2.5 V, 3.3 V |
| Maximum Operating Temperature | + 125 C |
| Minimum Operating Temperature | - 40 C |
| Package / Case | FBGA-256 |
| Mounting Style | SMD/SMT |
| Packaging | Tray |
| Supply Current | 55 mA |
| Supply Voltage - Max | 3.6 V |
| Supply Voltage - Min | 2.375 V |
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