High-density, high-performance PLDs in EPM7128AIQI is based on Altera's second-generation MAX architecture and it is constructed using cutting-edge CMOS technology and offers counter speeds of up to 175.4 MHz, ISP, pin-to-pin delays as little as 5 ns, and 600 to 5,000 useable gates. The PCI Special Interest is met by MAX 7000S devices in the -5, -6, -7, and -10 speed grades as well as MAX 7000 and MAX 7000E devices in the -5, -6, -7, -10P, and -12P speed grades.
EPM7128AIQI includes a number of improved features, including more global clocking, additional output enable controls, improved interconnect resources, fast input registers, and a programmable slew rate. The MAX 7000S devices, also known as the EPM7032S, EPM7064S, EPM7128S, EPM7160S, EPM7192S, and EPM7256S devices, are in-system programmable MAX 7000 components. In addition to JTAG BST circuitry in devices with 128 or more macrocells, ISP, and an open-drain output option, MAX 7000S devices have the improved features of MAX 7000E devices.
| Specification | Value |
|---|---|
| Series | MAX 7000 |
| Memory Type | EEPROM |
| Number of Macrocells | 128 |
| Maximum Operating Frequency | 192.3 MHz |
| Delay Time | 5 ns |
| Number of Programmable I/Os | 100 |
| Operating Supply Voltage | 3.3 V |
| Maximum Operating Temperature | + 70 C |
| Minimum Operating Temperature | 0 C |
| Package / Case | FBGA-256 |
| Mounting Style | SMD/SMT |
| Packaging | Tray |
| Supply Voltage - Max | 3.6 V |
| Supply Voltage - Min | 3 V |
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