Logic array blocks (LABs), groupings of 16 macrocells that are assembled into this EPM9560ARC208-3, range in size from 320 to 560 macrocells. Each macrocell features a configurable register with separately programmable clock, clock enable, clear, and preset capabilities as well as a programmable AND/fixed-OR array. Each macrocell features a dual-output structure that enables separate usage of the register and the product terms for greater flexibility. This feature makes it possible to create register-heavy and combinatorially demanding designs quickly. EPM9560ARC208-3 macrocell's dual-output design further increases logic use, raising the devices' actual capacity. Each macrocell can be augmented with up to 32 product terms to form complicated logic functions, including shared expander product terms and high-speed parallel expander product terms.
Specification | Value |
---|---|
Series | MAX 9000 |
Memory Type | EEPROM |
Number of Macrocells | 560 |
Maximum Operating Frequency | 144 MHz |
Delay Time | 10 ns |
Number of Programmable I/Os | 191 |
Operating Supply Voltage | 5 V |
Maximum Operating Temperature | + 85 C |
Minimum Operating Temperature | - 40 C |
Package / Case | QFP-240 |
Mounting Style | SMD/SMT |
Packaging | Tray |
Supply Current | 174 mA |
Supply Voltage - Max | 5.25 V |
Supply Voltage - Min | 4.75 V |
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