High-fanout PLL-based clock drivers with in-system programmability, ISPPAC-CLK5510V-01TN48C is intended for use in high performance computing and communications applications. When compared to the ispClock5520, the ispClock5510 offers up to 20 single-ended or 10 differential clock outputs, while the latter offers up to 10 single-ended or five differential clock outputs. It is possible to separately configure each pair of outputs to support a different output frequency and I/O standard (LVDS, LVPECL, LVTTL, LVCMOS, SSTL, HSTL). Each output also offers independent, programmable termination, slew-rate, and timing skew control. Nonvolatile E2 CMOS memory on-chip houses all configuration data. By offering programmable input and feedback dividers, the PLL and divider systems of the ispClock5500 enable the synthesis of clock frequencies different from those of the reference input. Five post-PLL V-dividers permit the production of five different output frequencies, adding more versatility. Any one of the five V-dividers' output can be used as loop feedback. The only difference between devices in the ISPPAC-CLK5510V-01TN48C is the quantity of inputs and outputs; all other functionalities are similar across all members of the family.
| Specification | Value |
|---|---|
| Maximum Operating Temperature | + 70 C |
| Package / Case | TQFP-100 |
| Packaging | Tray |
| Minimum Operating Temperature | 0 C |
| Mounting Style | SMD/SMT |
| Factory Pack Quantity | 1250 |
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Buy ISPPAC-CLK5520V-01T100C Lattice Semiconductor, Get familiar with the ISPPAC-CLK5520V-01T100C isp...
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