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Home > Product > Lattice Semiconductor > LatticeECP2/M Family
LFE2-20E-6Q208C

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LFE2-20E-6Q208C

Manufacturer:
Lattice
Package/Case:
PQFP-208
RoHS:
Lifecycle:
Stock Resource:
Factory Excess Stock / Franchised Distributor
Datasheet:
Product Categories:
FPGA - Field Programmable Gate Array
Description:
FPGA LatticeECP2 Family 21000 Cells 90nm Technology 1.2V 208-Pin PQFP Tray
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LFE2-20E-6Q208C Overview

The LFE2-20E-6Q208C of FPGA devices are designed to give high-performance capabilities including sophisticated DSP blocks, high-speed SERDES (LatticeECP2M family only), and high-speed source synchronous interfaces in a budget-friendly FPGA fabric. This combination was made possible by 90nm technology and improvements in device architecture. High performance and low cost are priorities when designing the LFE2-20E-6Q208C fabric. The LFE2-20E-6Q208C feature encryption ("S" versions only) and dual boot capabilities, as well as LUT-based logic, distributed and embedded memory, Phase Locked Loops (PLLs), Delay Locked Loops (DLLs), pre-engineered source synchronous I/O support, and enhanced sysDSP blocks. High-speed SERDES with PCS is a feature of the LFE2-20E-6Q208C. These SERDES with PCS blocks, which have high jitter tolerance and low transmission jitter, can be set up to handle a variety of well-liked data protocols, including PCI Express, Ethernet (1GbE and SGMII), OBSAI, and CPRI. Chip-to-chip and small form factor backplane applications are well suited for SERDES thanks to their transmit pre-emphasis and receive equalization settings. Large complicated designs can be efficiently built using the LFE2-20E-6Q208C thanks to Lattice Diamond design software. Popular logic synthesis tools include support for LFE2-20E-6Q208C synthesis libraries. The Diamond software places and routes the design in the LFE2-20E-6Q208C using the output from the synthesis tool and the limitations of its floor planning tools. For timing verification, the Diamond design tool pulls the timing from the routing and back-annotates it into the design. For the LFE2-20E-6Q208C, Lattice offers a wide variety of pre-engineered IP (Intellectual Property) modules. Because these IP cores serve as standardized building blocks, designers are free to focus on the distinctive features of their designs, which boosts productivity.

LFE2-20E-6Q208C Specifications

Specification Value
Number of I/Os 131
Maximum Operating Frequency 357 MHz
Operating Supply Voltage 1.2 V
Maximum Operating Temperature + 85℃
Mounting Style SMD/SMT
Package / Case PQFP-208
Minimum Operating Temperature 0 C
Packaging Tray
Factory Pack Quantity 120

Application Field

  • AI

    Artificial Intelligence

  • 5G Technology

    5G Technology

  • Cloud Computing

    Cloud Computing

  • Consumer Electronics

    Consumer Electronics

  • Wireless

    Wireless Technology

  • Industrial Control

    Industrial Control

  • Internet of Things

    Internet of Things

  • Medical Equipment

    Medical Equipment

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