LFXP2-8E-6M132IAEJ

LFXP2-8E-6M132IAEJ Overview

The flexiFLASH architecture used by LFXP2-8E-6M132IAEJ combines a Look-up Table (LUT) based FPGA fabric with non-volatile Flash cells. Instant-on, limitless reconfigurability, on-chip storage with FlashBAK integrated block memory and Serial TAG memory, as well as design security, are advantages of the flexiFLASH technology. The components also enable 128-bit AES Encryption, Live Updates with TransFR, and Dual-boot technologies.

High performance and low cost were priorities when developing the LFXP2-8E-6M132IAEJ for the new technology. Phase Locked Loops (PLLs), pre-engineered source synchronous I/O support, distributed and embedded memory, LUT-based logic, and improved sysDSP blocks are all features of LFXP2-8E-6M132IAEJ . Using LFXP2-8E-6M132IAEJ, big and complicated designs may be efficiently implemented thanks to Lattice Diamond design software. Popular logic synthesis tools can support LFXP2-8E-6M132IAEJ synthesis libraries. The Diamond software places and routes the design in the LFXP2-8E-6M132IAEJ device using the output from the synthesis tool and the limitations from its floor planning tools.

For timing verification, the Diamond tool pulls the timing from the routing and back-annotates it into the design. For LFXP2-8E-6M132IAEJ, Lattice offers a wide variety of LatticeCORE pre-designed Intellectual Property (IP) modules. Designers are able to concentrate on the distinctive elements of their designs, enhancing productivity, by employing these IPs as standardized building blocks.

LFXP2-8E-6M132IAEJ Specifications