XC73108-12PQ160C XC7300 CMOS EPLD from Xilinx, Inc

XC73108-12PQ160C Overview

The AMD Xilinx XC73108-12PQ160C is an integrated circuit that falls under the category of Field Programmable Gate Arrays (FPGAs). All XC73108-12PQ160C EPLDs include programmable power management features to specify high-performance or low-power operation on an individual Macrocell-by-Macrocell basis. Unused Macrocells are automatically turned off to minimize power dissipation. Designers can operate speed-critical paths at maximum performance, while non-critical paths dissipate less power. Xilinx development software supports XC73108-12PQ160C EPLD design using third-party schematic entry tools, HDL compilers, or direct equation-based text files. Using a PC or a workstation and one of these design capture methods, designs are automatically mapped to this device in a matter of minutes. This device is available in plastic and ceramic leaded chip carriers, pin-grid-array (PGA), ball-grid-array (BGA), and quad flat pack (QFP) packages. Package options include both windowed ceramic for design prototypes and one-time programmable plastic versions for cost-effective production volume. View Substitutes & Alternatives, datasheets, stock, pricing from Authorized Distributors, as well as other FPGAs goods, at www.vemeko.com.

XC73108-12PQ160C Features

Erasable Programmable Logic Devices (EPLDs) with high performance: 5 / 7.5 ns pin-to-pin speeds on all fast inputs; maximum clock frequency of 167 MHz
Fast function blocks and high-density function blocks comprise the advanced dual-block architecture (XC7354, XC7372, XC73108, XC73144).
Interconnect matrix at 100%
High-speed arithmetic carry network with 18-bit accumulators operating at 43 to 61 MHz and a 1 ns ripple-carry latency per bit
Several separate clocks
Every input can be set to be registered, latched, or direct.